43 static const char *cpu_arch_name(odp_cpu_arch_t cpu_arch)
46 case ODP_CPU_ARCH_ARM:
48 case ODP_CPU_ARCH_MIPS:
50 case ODP_CPU_ARCH_PPC:
52 case ODP_CPU_ARCH_RISCV:
54 case ODP_CPU_ARCH_X86:
61 static const char *arm_isa_name(odp_cpu_arch_arm_t isa)
64 case ODP_CPU_ARCH_ARMV6:
66 case ODP_CPU_ARCH_ARMV7:
68 case ODP_CPU_ARCH_ARMV8_0:
70 case ODP_CPU_ARCH_ARMV8_1:
72 case ODP_CPU_ARCH_ARMV8_2:
74 case ODP_CPU_ARCH_ARMV8_3:
76 case ODP_CPU_ARCH_ARMV8_4:
78 case ODP_CPU_ARCH_ARMV8_5:
80 case ODP_CPU_ARCH_ARMV8_6:
82 case ODP_CPU_ARCH_ARMV8_7:
84 case ODP_CPU_ARCH_ARMV9_0:
86 case ODP_CPU_ARCH_ARMV9_1:
88 case ODP_CPU_ARCH_ARMV9_2:
90 #if ODP_VERSION_API_NUM(1, 42, 1) <= ODP_VERSION_API
91 case ODP_CPU_ARCH_ARMV8_8:
93 case ODP_CPU_ARCH_ARMV8_9:
95 case ODP_CPU_ARCH_ARMV9_3:
103 static const char *x86_isa_name(odp_cpu_arch_x86_t isa)
106 case ODP_CPU_ARCH_X86_I686:
108 case ODP_CPU_ARCH_X86_64:
115 static const char *cpu_arch_isa_name(odp_cpu_arch_t cpu_arch,
116 odp_cpu_arch_isa_t cpu_arch_isa)
119 case ODP_CPU_ARCH_ARM:
120 return arm_isa_name(cpu_arch_isa.arm);
121 case ODP_CPU_ARCH_MIPS:
123 case ODP_CPU_ARCH_PPC:
125 case ODP_CPU_ARCH_RISCV:
127 case ODP_CPU_ARCH_X86:
128 return x86_isa_name(cpu_arch_isa.x86);
138 static odp_cpu_arch_arm_t detect_sw_isa_arm(
void)
140 #if defined(__ARM_ARCH)
141 if (__ARM_ARCH == 8) {
142 #ifdef __ARM_FEATURE_QRDMX
144 return ODP_CPU_ARCH_ARMV8_1;
146 return ODP_CPU_ARCH_ARMV8_0;
150 if (__ARM_ARCH == 9) {
152 return ODP_CPU_ARCH_ARMV9_0;
155 if (__ARM_ARCH >= 800) {
161 int major = __ARM_ARCH / 100;
162 int minor = __ARM_ARCH - (major * 100);
167 return ODP_CPU_ARCH_ARMV8_0;
169 return ODP_CPU_ARCH_ARMV8_1;
171 return ODP_CPU_ARCH_ARMV8_2;
173 return ODP_CPU_ARCH_ARMV8_3;
175 return ODP_CPU_ARCH_ARMV8_4;
177 return ODP_CPU_ARCH_ARMV8_5;
179 return ODP_CPU_ARCH_ARMV8_6;
181 return ODP_CPU_ARCH_ARMV8_7;
182 #if ODP_VERSION_API_NUM(1, 42, 1) <= ODP_VERSION_API
184 return ODP_CPU_ARCH_ARMV8_8;
186 return ODP_CPU_ARCH_ARMV8_9;
189 return ODP_CPU_ARCH_ARM_UNKNOWN;
191 }
else if (major == 9) {
194 return ODP_CPU_ARCH_ARMV9_0;
196 return ODP_CPU_ARCH_ARMV9_1;
198 return ODP_CPU_ARCH_ARMV9_2;
199 #if ODP_VERSION_API_NUM(1, 42, 1) <= ODP_VERSION_API
201 return ODP_CPU_ARCH_ARMV9_3;
204 return ODP_CPU_ARCH_ARM_UNKNOWN;
209 return ODP_CPU_ARCH_ARM_UNKNOWN;
216 static odp_cpu_arch_x86_t detect_sw_isa_x86(
void)
218 odp_cpu_arch_x86_t isa_x86 = ODP_CPU_ARCH_X86_UNKNOWN;
220 #if defined __x86_64 || defined __x86_64__
221 isa_x86 = ODP_CPU_ARCH_X86_64;
222 #elif defined __i686 || defined __i686__
223 isa_x86 = ODP_CPU_ARCH_X86_I686;
228 static odp_cpu_arch_mips_t detect_sw_isa_mips(
void)
230 return ODP_CPU_ARCH_MIPS_UNKNOWN;
233 static odp_cpu_arch_ppc_t detect_sw_isa_ppc(
void)
235 return ODP_CPU_ARCH_PPC_UNKNOWN;
238 static odp_cpu_arch_riscv_t detect_sw_isa_riscv(
void)
240 return ODP_CPU_ARCH_RISCV_UNKNOWN;
247 static odp_cpu_arch_isa_t detect_sw_isa(odp_cpu_arch_t cpu_arch)
249 odp_cpu_arch_isa_t sw_isa;
252 case ODP_CPU_ARCH_ARM:
253 sw_isa.arm = detect_sw_isa_arm();
255 case ODP_CPU_ARCH_MIPS:
256 sw_isa.mips = detect_sw_isa_mips();
258 case ODP_CPU_ARCH_PPC:
259 sw_isa.ppc = detect_sw_isa_ppc();
261 case ODP_CPU_ARCH_RISCV:
262 sw_isa.riscv = detect_sw_isa_riscv();
264 case ODP_CPU_ARCH_X86:
265 sw_isa.x86 = detect_sw_isa_x86();
268 sw_isa.arm = ODP_CPU_ARCH_ARM_UNKNOWN;
275 void print_core_map_info(
void)
277 EM_PRINT(
"Core mapping: EM-core <-> phys-core <-> ODP-thread\n");
279 for (
int logic_core = 0; logic_core <
em_core_count(); logic_core++) {
280 EM_PRINT(
" %2i %2i %2i\n",
283 logic_to_thr_core_id(logic_core));
289 void print_cpu_arch_info(
void)
291 odp_system_info_t sysinfo;
294 err = odp_system_info(&sysinfo);
296 EM_PRINT(
"%s(): odp_system_info() call failed:%d\n",
302 odp_cpu_arch_isa_t isa_em = detect_sw_isa(sysinfo.cpu_arch);
304 const char *cpu_arch = cpu_arch_name(sysinfo.cpu_arch);
305 const char *hw_isa = cpu_arch_isa_name(sysinfo.cpu_arch,
307 const char *sw_isa_odp = cpu_arch_isa_name(sysinfo.cpu_arch,
309 const char *sw_isa_em = cpu_arch_isa_name(sysinfo.cpu_arch, isa_em);
311 EM_PRINT(
"CPU model: %s\n"
313 "CPU ISA version: %s\n"
314 " SW ISA version (ODP): %s\n"
315 " SW ISA version (EM): %s\n"
317 odp_cpu_model_str(), cpu_arch,
318 hw_isa, sw_isa_odp, sw_isa_em);
321 static void print_mem_info(
void)
323 EM_PRINT(
"EM shared mem size: %zu B\n"
324 "EM local mem size: %zu B (per core)\n",
327 EM_DBG(
"\nem_locm_t:\t\t\t offset\t size\n"
328 "\t\t\t\t ------\t ----\n"
329 "current:\t\t\t%5zu B\t%5zu B\n"
330 "idle_state:\t\t\t%5zu B\t%5zu B\n"
331 "core_id:\t\t\t%5zu B\t%5zu B\n"
332 "event_burst_cnt:\t\t%5zu B\t%5zu B\n"
333 "atomic_group_released:\t\t%5zu B\t%5zu B\n"
334 "do_input_poll:\t\t\t%5zu B\t%5zu B\n"
335 "do_output_drain:\t\t%5zu B\t%5zu B\n"
336 "is_external_thr:\t\t%5zu B\t%5zu B\n"
337 "is_sched_paused:\t\t%5zu B\t%5zu B\n"
338 "dispatch_cnt:\t\t\t%5zu B\t%5zu B\n"
339 "dispatch_last_run:\t\t%5zu B\t%5zu B\n"
340 "poll_drain_dispatch_cnt:\t%5zu B\t%5zu B\n"
341 "poll_drain_dispatch_last_run:\t%5zu B\t%5zu B\n"
342 "local_queues:\t\t\t%5zu B\t%5zu B\n"
343 "start_eo_elem:\t\t\t%5zu B\t%5zu B\n"
344 "error_count:\t\t\t%5zu B\t%5zu B\n"
345 "log_fn:\t\t\t\t%5zu B\t%5zu B\n"
346 "sync_api:\t\t\t%5zu B\t%5zu B\n"
347 "debug_ts[]:\t\t\t%5zu B\t%5zu B\n"
348 "output_queue_track:\t\t%5zu B\t%5zu B\n"
349 "end:\t\t\t\t%5zu B\t%5zu B\n\n",
357 sizeof_field(
em_locm_t, event_burst_cnt),
358 offsetof(
em_locm_t, atomic_group_released),
359 sizeof_field(
em_locm_t, atomic_group_released),
363 sizeof_field(
em_locm_t, do_output_drain),
365 sizeof_field(
em_locm_t, is_external_thr),
367 sizeof_field(
em_locm_t, is_sched_paused),
371 sizeof_field(
em_locm_t, dispatch_last_run),
372 offsetof(
em_locm_t, poll_drain_dispatch_cnt),
373 sizeof_field(
em_locm_t, poll_drain_dispatch_cnt),
374 offsetof(
em_locm_t, poll_drain_dispatch_last_run),
375 sizeof_field(
em_locm_t, poll_drain_dispatch_last_run),
389 sizeof_field(
em_locm_t, output_queue_track),
395 void print_version_info(
void)
398 "===========================================================\n"
399 "EM version information: %s\n"
400 "===========================================================\n"
401 "EM API version: %s\n"
408 "(EM_CHECK_LEVEL:%d, EM_ESV_ENABLE:%d)\n"
409 "EM build info: %s\n"
410 "ODP API version: %s\n"
411 "ODP impl name: %s\n"
412 "ODP impl details: %s\n",
416 odp_version_api_str(),
417 odp_version_impl_name(),
418 odp_version_impl_str());
420 print_cpu_arch_info();
429 "===========================================================\n"
430 "EM Info on target: %s\n"
431 "===========================================================\n",
434 print_core_map_info();
436 print_queue_elem_info();
439 print_pool_elem_info();
440 print_ag_elem_info();